Jiang, Jie-Hong Roland: search on Z-Library

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1

[IEEE 2020 57th ACM/IEEE Design Automation Conference (DAC) - San Francisco, CA, USA (2020.7.20-2020.7.24)] 2020 57th ACM/IEEE Design Automation Conference (DAC) - Circuit Learning for Logic Regression on High Dimensional Boolean Space

Chen, Pei-Wei, Huang, Yu-Ching, Lee, Cheng-Lin, Jiang, Jie-Hong Roland

Year:

2020

File:

PDF, 1.11 MB

2020

2

[IEEE 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC) - San Francisco, CA, USA (2018.6.24-2018.6.28)] 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC) - Efficient Multi-Layer Obstacle-Avoiding Region-to-Region Rectilinear Steiner Tree Construction *

Wang, Run-Yi, Pai, Chia-Cheng, Wang, Jun-Jie, Wen, Hsiang-Ting, Pai, Yu-Cheng, Chang, Yao-Wen, CM Li, James, Jiang, Jie-Hong Roland

Year:

2018

Language:

english

File:

PDF, 1.49 MB

english, 2018

3

[IEEE 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS) - Boise, ID, USA (2012.08.5-2012.08.8)] 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS) - Reducing test point overhead with don't-cares

Chang, Kai-Hui, Chang, Chia-Wei, Jiang, Jie-Hong Roland, Liu, Chien-Nan Jimmy

Year:

2012

Language:

english

File:

PDF, 353 KB

english, 2012

4

[IEEE 2011 International Symposium on Quality Electronic Design (ISQED) - Santa Clara, CA, USA (2011.03.14-2011.03.16)] 2011 12th International Symposium on Quality Electronic Design - Constraint generation for software-based post-silicon bug masking with scalable resynthesis technique for constraint optimization

Chang, Chia-Wei, Chou, Hong-Zu, Chang, Kai-Hui, Jiang, Jie-Hong Roland, Liu, Chien-Nan Jimmy, Hsiao, Chiu-Han, Kuo, Sy-Yen

Year:

2011

Language:

english

File:

PDF, 98 KB

english, 2011

5

[ACM Press the 49th Annual Design Automation Conference - San Francisco, California (2012.06.03-2012.06.07)] Proceedings of the 49th Annual Design Automation Conference on - DAC '12 - Functional timing analysis made fast and general

Chung, Yi-Ting, Jiang, Jie-Hong Roland

Year:

2012

Language:

english

File:

PDF, 707 KB

english, 2012

6

Towards Formal Evaluation and Verification of Probabilistic Design

Lee, Nian-Ze, Jiang, Jie-Hong Roland

Journal:

IEEE Transactions on Computers

Year:

2018

Language:

english

File:

PDF, 713 KB

english, 2018

7

[IEEE 2019 IEEE Biomedical Circuits and Systems Conference (BioCAS) - Nara, Japan (2019.10.17-2019.10.19)] 2019 IEEE Biomedical Circuits and Systems Conference (BioCAS) - Biochemical Threshold Function Implementation with Zero-Order Ultrasensitivity

Huang, Wei-Chih, Jiang, Jie-Hong Roland, Fages, Francois, Molina, Franck

Year:

2019

File:

PDF, 951 KB

2019

8

Electronic Design Automation || Logic synthesis in a nutshell

Jiang, Jie-Hong (Roland)

Year:

2009

Language:

english

File:

PDF, 768 KB

english, 2009

9

[ACM Press the 40th International Conference - Gothenburg, Sweden (2018.05.27-2018.06.03)] Proceedings of the 40th International Conference on Software Engineering Companion Proceeedings - ICSE '18 - Static detection of API call vulnerabilities in iOS executables

Lin, Chun-Han, Yu, Fang, Jiang, Jie-Hong Roland, Bultan, Tevfik

Year:

2018

Language:

english

File:

PDF, 85 KB

english, 2018

10

[IEEE 2013 Formal Methods in Computer-Aided Design (FMCAD) - Portland, OR (2013.10.20-2013.10.23)] 2013 Formal Methods in Computer-Aided Design - Synthesizing multiple boolean functions using interpolation on a single proof

Hofferek, Georg, Gupta, Ashutosh, Konighofer, Bettina, Jiang, Jie-Hong Roland, Bloem, Roderick

Year:

2013

Language:

english

File:

PDF, 550 KB

english, 2013

11

[IEEE 2012 10th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2012) - Arlington, VA, USA (2012.07.16-2012.07.17)] Tenth ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMCODE2012) - Improving design verifiability by early RTL coverability analysis

Chang, Kai-Hui, Chang, Chia-Wei, Jiang, Jie-Hong Roland, Liu, Chien-Nan Jimmy

Year:

2012

Language:

english

File:

PDF, 322 KB

english, 2012

12

[IEEE 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD 2010) - San Jose, CA (2010.11.7-2010.11.11)] 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) - A robust functional ECO engine by SAT proof minimization and interpolation techniques

Bo-Han Wu,, Chun-Ju Yang,, Chung-Yang Huang,, Jiang, Jie-Hong Roland

Year:

2010

Language:

english

File:

PDF, 239 KB

english, 2010

13

[ACM Press Proceeding of the ACM/SIGDA international symposium - Monterey, California, USA (2009.02.22-2009.02.24)] Proceeding of the ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '09 - Scalable don't-care-based logic optimization and resynthesis

Mishchenko, Alan, Brayton, Robert, Jiang, Jie-Hong Roland, Jang, Stephen

Year:

2009

Language:

english

File:

PDF, 501 KB

english, 2009

14

[ACM Press the 55th Annual Design Automation Conference - San Francisco, California (2018.06.24-2018.06.29)] Proceedings of the 55th Annual Design Automation Conference on - DAC '18 - Efficient multi-layer obstacle-avoiding region-to-region rectilinear steiner tree construction

Wang, Run-Yi, Pai, Chia-Cheng, Wang, Jun-Jie, Wen, Hsiang-Ting, Pai, Yu-Cheng, Chang, Yao-Wen, Li, James C M, Jiang, Jie-Hong (Roland)

Year:

2018

Language:

english

File:

PDF, 717 KB

english, 2018

15

[IEEE 2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) - Fredericton, NB, Canada (2019.5.21-2019.5.23)] 2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) - Synthesis of Nondeterministic Behavior in Recombinase-Based Genetic Circuits

Lin, Zi-Jun, Huang, Wei-Chih, Jiang, Jie-Hong Roland

Year:

2019

Language:

english

File:

PDF, 350 KB

english, 2019

16

[IEEE 2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) - Fredericton, NB, Canada (2019.5.21-2019.5.23)] 2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL) - Synthesis of Nondeterministic Behavior in Recombinase-Based Genetic Circuits

Lin, Zi-Jun, Huang, Wei-Chih, Jiang, Jie-Hong Roland

Year:

2019

File:

PDF, 350 KB

2019

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